DTU spin-out (2024). Optimization algorithms for analog IC design: ~20 simulations vs thousands, 10-100x faster than commercial tools. From AICA InnoExplorer project.
IC Optimize / OptIC (DTU spin-out, 2024) develops Bayesian optimization algorithms that complete analog IC block designs in ~20 simulations instead of thousands — achieving 10-100x speedup (38x average) over commercial EDA tools. Founded by Nicolai Jerram Dahl (PhD, DTU Electro), the technology emerged from the AICA InnoExplorer project. Targets analog block design: amplifiers, references, converters, PLLs. Supported by Spin-outs Denmark (Velux Foundations, up to DKK 600K + bench fees).